IBM has historically updated some part of its product line, hardware or software, in the Spring and Fall seasons, keeping the "new and improved" banner fluttering to generate opportunities for its feet-on-the-street sales force. IBM's 2009 April update (Spring here in the US, but Fall for our Australian co-workers) included a number of new features, many of them significant, announced under IBM's Dynamic Infrastructure umbrella. Hidden among the multiple coordinated announcements (most of which will be reflected in IDEAS' Competitive Profiles) was the sheepish acknowledgement that POWER6+ has arrived.
Intel's "tick-tock" schedule of introducing chips formalized what IBM had already been practicing – it is less risky if fabrication technology advances and processor logic-design advances are separated into independent chip releases. But first, forgive some reminiscence.
In the old days, when I was a mainframe processor designer, too often management's "scheduling of invention" unsuccessfully bet that breakthrough fabrication advances would conveniently coincide with innovative processor design patents. Back then, the repercussion of misaligned fabrication/design advances left the customer to suffer the delays. Since there were few serious alternatives, mainframe customers were stuck with IBM-brand systems and the delayed introduction of new servers typically resulted in a frenzied "first-day-order" lottery, along with proverbial rumors of bodegas winning early ship dates for multi-million dollar behemoths and profiting immensely by selling their spot in line.
In the RISC space, starting with POWER4 (and perhaps even before), IBM instituted a more disciplined approach, which Intel later popularized. The milestones:
- POWER4 (new dual-core design at 180nm),
- POWER4+ (incremental design with faster clocks, 130nm),
- POWER5 (new design with SMT, still 130nm),
- POWER5+ (incremental design with faster clocks, 90nm).
Then came POWER6. To deliver its leapfrog competitive performance, at least on a per-core basis, POWER6 not only incorporated a new logic design, but also moved to 65nm. That upped the ante for POWER6+. To keep up with Intel, POWER6+ needed to be delivered at 45nm or smaller, and incorporate at least 4 cores per die. However, IBM seems only to have added some incremental design enhancements (better storage keys, etc.).
Apparently, POWER6+ slipped out, unheralded, in the second half of last year with the Power 560 and Power 570 enhancements. Now with the updated Power 520 and Power 550 employing POWER6+, IBM has reluctantly admitted that POWER6+ is not the headline-grabber it had once hoped. (Acknowledgement -- Timothy Prickett Morgan uncovered this a few days before the rest of us.)
In its heyday, Digital Equipment Corp was infamous for its stealth marketing (parodied with the oft-repeated analogy that Digital's attempt to market sushi would be as "cold, dead fish.") But while Digital often couldn't figure out how to properly market some of its wonderful technology, IBM has usually performed superbly in marketing its own technological breakthroughs. Could it be that POWER6+ didn’t quite live up to IBM’s dreams, leaving IBM for once with the task of downplaying its introduction?
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